Skip to content
View Lasimeri's full-sized avatar

Block or report Lasimeri

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Content in all repositories owned by your account will be closed.
Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. vllm-dsv4-ampere vllm-dsv4-ampere Public

    DeepSeek-V4-Flash on Ampere SM 8.6 via vLLM (pyref kernel replacements)

    Python 35 4

  2. Intel-Phi-3120A Intel-Phi-3120A Public

    From-scratch Rust host stack and mainline-kernel port for an Intel Xeon Phi 3120A (Knights Corner) coprocessor: SSH in, run C/Python/JS on 57 cores. No MPSS.

    Assembly 6 1

  3. ncompress ncompress Public

    Multi-GPU Zstandard compression using NVIDIA nvCOMP

    Rust 3

  4. Intel-Phi-AVX-512-ASM Intel-Phi-AVX-512-ASM Public

    A Xeon Phi 3120 (Knights Corner) executes AVX-512 on behalf of a host CPU that has none: unmodified programs, bit-identical results

    Assembly 3

  5. Mechanical-Jev Mechanical-Jev Public

    The asking side of Jev (TypeSafe System One: noul, choice, score) in Rust: client library, mjev CLI, evaluation harness, and Jev reverse engineered from its docs. Talks to Intel-Phi-Jev.

    Rust 3

  6. Intel-Phi-LLVM Intel-Phi-LLVM Public

    LLVM and Clang for the Xeon Phi 3120A (Knights Corner): the MVEX vector unit as a knc feature and CPU, verified sources, Intel's assembler as oracle

    C 3